MDCCLKDIV=DIVBY8
Network configuration register
| SPEED | Speed |
| FULLDUPLEX | Full duplex |
| DISCRDNONVLANFRAMES | Discard non-VLAN frames |
| JUMBOFRAMES | Jumbo frames enable |
| COPYALLFRAMES | Copy all frames |
| NOBROADCAST | No broadcast |
| MULTICASTHASHEN | Multicast hash enable |
| UNICASTHASHEN | Unicast hash enable |
| RX1536BYTEFRAMES | Receive 1536 byte frames |
| RETRYTEST | Retry test |
| PAUSEEN | Pause enable |
| RXBUFFOFFSET | Receive buffer offset |
| LENFIELDERRFRMDISCRD | Length field error frame discard |
| FCSREMOVE | FCS remove |
| MDCCLKDIV | MDC clock division 0 (DIVBY8): divide HFBUSCLKETH by 8 (HFBUSCLKETH up to 20 MHz) 1 (DIVBY16): divide HFBUSCLKETH by 16 (HFBUSCLKETH up to 40 MHz) 2 (DIVBY32): divide HFBUSCLKETH by 32 (HFBUSCLKETH up to 80 MHz) 3 (DIVBY48): divide HFBUSCLKETH by 48 (HFBUSCLKETH up to 120 MHz) 4 (DIVBY64): divide HFBUSCLKETH by 64 (HFBUSCLKETH up to 160 MHz) 5 (DIVBY96): divide HFBUSCLKETH by 96 (HFBUSCLKETH up to 240 MHz) 6 (DIVBY128): divide HFBUSCLKETH by 128 (HFBUSCLKETH up to 320 MHz) 7 (DIVBY224): divide HFBUSCLKETH by 224 (HFBUSCLKETH up to 540 MHz) |
| DISCOPYOFPFRAMES | Disable copy of pause frames |
| RXCHKSUMOFFLOADEN | Receive checksum offload enable |
| ENHALFDUPLEXRX | Enable frames to be received in half-duplex mode while transmitting. |
| IGNORERXFCS | Ignore RX FCS |
| IPGSTRTCHEN | IPG stretch enable |
| NSPCHANGE | Receive bad preamble. |
| IGNOREIPGRXER | Ignore IPG rx_er. |